Результаты исследований: Научные публикации в периодических изданиях › статья › Рецензирование
A 32-channel 840Msps TDC based on Altera Cyclone III FPGA. / Grigoriev, D. N.; Kasyanenko, P. V.; Kravchenko, E. A. и др.
в: Journal of Instrumentation, Том 12, № 8, 08025, 31.08.2017.Результаты исследований: Научные публикации в периодических изданиях › статья › Рецензирование
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TY - JOUR
T1 - A 32-channel 840Msps TDC based on Altera Cyclone III FPGA
AU - Grigoriev, D. N.
AU - Kasyanenko, P. V.
AU - Kravchenko, E. A.
AU - Shamov, A. G.
AU - Talyshev, A. A.
PY - 2017/8/31
Y1 - 2017/8/31
N2 - In this work we present a newly developed TDC (Time-to-Digital Converter) board in the VME-32 standard. The 32-channel TDC board is based on a single FPGA Altera Cyclone III chip. The main parameters of the TDC are as follows: a resolution of 1.19 ns, a dead time of 4.76 ns, and a maximal time interval of 19 504 ns.
AB - In this work we present a newly developed TDC (Time-to-Digital Converter) board in the VME-32 standard. The 32-channel TDC board is based on a single FPGA Altera Cyclone III chip. The main parameters of the TDC are as follows: a resolution of 1.19 ns, a dead time of 4.76 ns, and a maximal time interval of 19 504 ns.
KW - Cherenkov detectors
KW - Data acquisition concepts
KW - Digital electronic circuits
KW - FARICH PROTOTYPE
UR - http://www.scopus.com/inward/record.url?scp=85031048259&partnerID=8YFLogxK
U2 - 10.1088/1748-0221/12/08/C08025
DO - 10.1088/1748-0221/12/08/C08025
M3 - Article
AN - SCOPUS:85031048259
VL - 12
JO - Journal of Instrumentation
JF - Journal of Instrumentation
SN - 1748-0221
IS - 8
M1 - 08025
ER -
ID: 9893726