Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Research › peer-review
System architecture for deep packet inspection in high-speed networks. / Khazankin, Grigory R.; Komarov, Sergey; Kovalev, Danila et al.
Proceedings - 2017 Siberian Symposium on Data Science and Engineering, SSDSE 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 27-32 8071958.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Research › peer-review
}
TY - GEN
T1 - System architecture for deep packet inspection in high-speed networks
AU - Khazankin, Grigory R.
AU - Komarov, Sergey
AU - Kovalev, Danila
AU - Barsegyan, Artur
AU - Likhachev, Alexander
PY - 2017/10/18
Y1 - 2017/10/18
N2 - To solve the problems associated with large data volume real-time processing, heterogeneous systems using various computing devices are increasingly used. The characteristic of solving this class of problems is related to the fact that there are two directions for improving methods of real-time data analysis: the first is the development of algorithms and approaches to analysis, and the second is the development of hardware and software. This article reviews the main approaches to the architecture of a hardware-software solution for traffic capture and deep packet inspection (DPI) in data transmission networks with a bandwidth of 80 Gbit/s and higher. At the moment there are software and hardware tools that allow designing the architecture of capture system and deep packet inspection: • Using only the central processing unit (CPU); • Using only the graphics processing unit (GPU); • Using the central processing unit and graphics processing unit simultaneously (CPU + GPU). In this paper, we consider these key approaches. Also attention is paid to both hardware and software requirements for the architecture of solutions. Pain points and remedies are described.
AB - To solve the problems associated with large data volume real-time processing, heterogeneous systems using various computing devices are increasingly used. The characteristic of solving this class of problems is related to the fact that there are two directions for improving methods of real-time data analysis: the first is the development of algorithms and approaches to analysis, and the second is the development of hardware and software. This article reviews the main approaches to the architecture of a hardware-software solution for traffic capture and deep packet inspection (DPI) in data transmission networks with a bandwidth of 80 Gbit/s and higher. At the moment there are software and hardware tools that allow designing the architecture of capture system and deep packet inspection: • Using only the central processing unit (CPU); • Using only the graphics processing unit (GPU); • Using the central processing unit and graphics processing unit simultaneously (CPU + GPU). In this paper, we consider these key approaches. Also attention is paid to both hardware and software requirements for the architecture of solutions. Pain points and remedies are described.
KW - CUDA
KW - DMA
KW - DPDK
KW - DPI
KW - GPUDirect
KW - Mellanox
KW - Napatech
KW - NVIDIA
KW - PeerDirect
KW - Zero-copy
UR - http://www.scopus.com/inward/record.url?scp=85040332054&partnerID=8YFLogxK
UR - https://elibrary.ru/item.asp?id=35531488
U2 - 10.1109/SSDSE.2017.8071958
DO - 10.1109/SSDSE.2017.8071958
M3 - Conference contribution
AN - SCOPUS:85040332054
SP - 27
EP - 32
BT - Proceedings - 2017 Siberian Symposium on Data Science and Engineering, SSDSE 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 Siberian Symposium on Data Science and Engineering, SSDSE 2017
Y2 - 12 April 2017 through 13 April 2017
ER -
ID: 9642208