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Computer Capacity As a Tool for the Processors Development Analysis

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Research › peer-review

DOI

https://doi.org/10.1109/REDUNDANCY48165.2019.9003328
Final published version

Original language	English
Title of host publication	2019 16th International Symposium "Problems of Redundancy in Information and Control Systems", REDUNDANCY 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	186-190
Number of pages	5
ISBN (Electronic)	9781728119441
DOIs	https://doi.org/10.1109/REDUNDANCY48165.2019.9003328
Publication status	Published - Oct 2019
Event	16th International Symposium "Problems of Redundancy in Information and Control Systems", REDUNDANCY 2019 - Moscow, Russian Federation Duration: 21 Oct 2019 → 25 Oct 2019

Publication series

Name	2019 16th International Symposium "Problems of Redundancy in Information and Control Systems", REDUNDANCY 2019

Conference

Conference	16th International Symposium "Problems of Redundancy in Information and Control Systems", REDUNDANCY 2019
Country/Territory	Russian Federation
City	Moscow
Period	21.10.2019 → 25.10.2019

Research areas

computer capacity, information theory, performance, processors architecture, processors characteristics

ID: 25313477